Data buses are used in integrated circuits (ICs) to transfer data between master devices, such as user-controlled microprocessors, and slave devices that control peripheral devices, such as a memory or the like. To avoid overlapping data messages that may lead to error in data transmission between the master and slave devices, it is common to employ an arbiter to arbitrate message traffic on the bus. One such bus design is an Advanced High-performance Bus (AHB) from ARM Limited of Cambridge, England. The AHB bus design is a form of an Advanced Microcontroller Bus Architecture (AMBA) bus. The AHB bus provides high performance, high clock frequency data transfer between multiple bus master devices and multiple bus slave devices through use of an arbiter. The AHB bus is particularly useful in integrated circuit chips, including single chip processors, to couple processors to on-chip memories and to off-chip external memory interfaces.
Many bus designs, including the AHB bus, employ a split technique that is initiated when a slave device identifies that a command from a master device might not be serviced by the slave device within some prescribed criterion. For example, retrieval of data in response to a read command might require several bus cycles to complete before the slave device is ready to transfer the data to the requesting master device. Rather than hold the bus in a busy state while the slave device readies the data, the slave device may issue a split, blocking the requesting master device from the bus and idling the bus for use by other master devices. When the slave device becomes ready to accept commands, it removes the block from the originally requesting master device so that the arbiter may re-arbitrate that master device's request in accordance with the arbiter's protocol (along with all other requests that may be then existing) to eventually grant the re-arbitrated master device access to the bus. For example, where the slave device issued the split while it retrieves data from an external memory, when the data are retrieved and ready for transfer, the slave device removes the block from the requesting master device so that upon re-arbitration and re-grant to that master device, the master device re-issues its command to the slave device to complete the transfer.
Another example of the use of splits occurs where the slave device has queued several commands it is unable to service within a prescribed criterion. In this case, when the slave device that issued plural splits becomes ready to accept commands, it releases at least one of the split master devices so the arbiter may thereafter re-arbitrate that master device. However, the release of the split is issued in response to the transfer of the last beat of data for the command being executed. Consequently, valuable time can be lost as the split master device is first unblocked and the arbiter then re-arbitrates the priority.